Global memory
Global memory is the CUDA address space through which threads access data with device-wide visibility and allocation lifetime beyond one block.
How it works
Global loads and stores normally pass through a cache hierarchy before reaching physical memory. Visibility alone does not order concurrent accesses: communicating threads need the appropriate synchronization and memory-ordering protocol.
Work through an example
A model’s weight buffer is typically accessed through global addresses. Neighboring lanes loading neighboring values can combine into fewer sectors; later reuse may be served by cache.
Where the term can mislead
Global is a scope, not a promise that every access reaches HBM. Do not estimate DRAM traffic by simply counting source-level loads.
Connect the idea
Take it into practice
Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.
New to GPUs? Start with the free execution-model concept.
Sources and scope
Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.