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Parallel Thread Execution

PTX is NVIDIA’s virtual instruction-set representation for device code. It describes operations and execution semantics before final lowering to a particular GPU’s machine instructions.

PTX

How it works

A toolchain can compile PTX ahead of time into a cubin, or an application can provide PTX for the driver to compile at load time. Virtual registers and instructions may be transformed during that lowering.

Work through an example

An arithmetic expression in generated PTX may become several native instructions or combine with another expression. Inspect the final SASS when investigating actual register use or instruction selection.

Where the term can mislead

PTX is not the machine code the SM directly executes. A driver must also understand the PTX version and supported features in the artifact.

Connect the idea

Take it into practice

Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.

New to GPUs? Start with the free execution-model concept.

Sources and scope

Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.

  1. NVIDIA PTX ISA: instruction semantics and target requirements ↗
  2. NVIDIA CUDA compiler driver documentation ↗
  3. NVIDIA CUDA Compatibility guide ↗