Scoreboard stall
A scoreboard stall occurs when a warp cannot issue its next instruction because a tracked dependency has not completed.
How it works
Nsight Compute associates long-scoreboard waits with L1TEX operations such as local or global memory accesses, and short-scoreboard waits with relevant MIO operations such as shared-memory accesses. Samples commonly point to the waiting consumer instruction; inspect its producers to understand the delay.
Four resident warps. Two ready. One selected.
Work through an example
An add consuming a loaded register can collect long-scoreboard samples even though the add itself performs no memory access. Follow that register back to the load and examine access patterns and independent work.
Where the term can mislead
A long-scoreboard percentage does not prove HBM bandwidth saturation. Cache behavior, dependent accesses and insufficient concurrency can produce waits too.
Connect the idea
Take it into practice
Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.
New to GPUs? Start with the free execution-model concept.
Sources and scope
Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.