L2 cache
L2 is a cache shared across the GPU that sits between SM memory requests and device memory. Its capacity and bandwidth affect how much traffic reaches DRAM.
How it works
A value loaded by one block may still be in L2 when another block requests it. Reuse therefore depends on working-set size and the intervening traffic. Cache policy controls exist, but their effects require measurement on the target workload.
Work through an example
Running a small kernel repeatedly over the same arrays can measure cache-resident performance. A production workload with larger or changing arrays can generate much more DRAM traffic.
Where the term can mislead
Calculate arithmetic intensity at a named memory boundary. Bytes requested by instructions, L2 traffic and DRAM traffic need not match.
Connect the idea
Take it into practice
Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.
New to GPUs? Start with the free execution-model concept.
Sources and scope
Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.