Shared-memory bank conflict
A bank conflict occurs when a shared-memory instruction requests different addresses that the hardware must serve through the same bank, requiring additional service steps.
How it works
For a simplified 32-bank layout with four-byte words, word index modulo 32 selects the bank. Consecutive words distribute across banks; a stride of 32 words maps different addresses to the same bank. Supported same-address broadcasts are a separate case.
Work through an example
A row-major 32 × 32 FP32 tile read down a column maps all 32 words to one bank in this model. Padding rows to 33 words distributes that column across 32 banks.
The padding fix, one lane at a time
One warp reads 32 distinct four-byte words from 32 shared-memory banks. Watch which bank each lane uses.
Predict it: what changes from stride 32 to 33?
Stride 32 sends 32 different words to one bank. Stride 33 sends one word to each of 32 banks. Padding changes the mapping, while using one extra word of storage per row.
Where the term can mislead
Padding consumes storage and can affect other access paths. Wider accesses and specialized instructions require their actual bank mapping, not this simplified rule alone.
Connect the idea
Take it into practice
Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.
New to GPUs? Start with the free execution-model concept.
Sources and scope
Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.