L1 data cache
The L1 data cache is an on-SM cache that can satisfy supported memory requests without fetching the data again from a more distant cache or device memory.
How it works
On several NVIDIA architectures, L1 caching and software-managed shared memory use a combined on-chip resource. Their roles remain different: the hardware manages cache residency, while a kernel explicitly coordinates shared-memory values.
Work through an example
A repeated load that hits L1 can reduce downstream traffic. An address pattern that touches many sectors may still spend load/store or cache bandwidth even if few bytes reach DRAM.
Where the term can mislead
A cache hit rate needs a request population and workload context. A high hit rate does not by itself establish short kernel time.
Connect the idea
Take it into practice
Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.
New to GPUs? Start with the free execution-model concept.
Sources and scope
Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.
