Tensor Memory
Tensor Memory is specialized on-SM storage used by supported Blackwell tensor instructions, including their matrix accumulators. It is distinct from ordinary thread registers, shared memory and device DRAM.
How it works
Instructions in the tcgen05 family impose specific operand placement and access rules. A kernel must allocate the required Tensor Memory, coordinate its producers and consumers, and move results to ordinary storage when later operations need them.
Work through an example
In a supported matrix-accumulation path, the accumulator remains in Tensor Memory while tiles contribute products. A later epilogue retrieves the result to apply scaling or write output.
Where the term can mislead
Blackwell is a family, not a promise that every chip supports the same tcgen05 path. Check the instruction target and device compute capability.
Connect the idea
Take it into practice
Continue with the existing concept, apply it to an interview problem, or follow a course lesson. Access requirements are shown before you open a page.
New to GPUs? Start with the free execution-model concept.
Sources and scope
Examples here are teaching calculations, not measured GPU performance. Consult the linked documentation for the exact device, instruction and tool version. Source review: 25 October 2026.