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CUDA, Triton & Kernel Engineering

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CUDA & Triton Kernel Interview Questions

Coalescing, shared memory and bank conflicts, occupancy, fusion, tiled GEMM, FlashAttention internals, Triton, CUTLASS, Nsight profiling and torch.compile: the live-coding and take-home round at NVIDIA, Fireworks, Together and the labs' performance teams.

Learn how AI infrastructure works through explanations, worked examples and diagrams, then practise applying it to interview questions.

Work through the numbers

Change the assumptions in a free calculator, then explain what the result establishes and what still needs measurement.

A starting path through this topic

Start with a mechanism, then use a worked problem to explain a decision. Access labels below describe what is available without an account.

  1. CUDA Programming Model

    Connect grid, block and thread behavior to the first kernel you run.

    Public concept
  2. Kernel Fusion

    Explain which memory traffic fusion removes and when it stops helping.

    Public concept
  3. Write a CUDA vector add and explain the launch: grid math, the bounds check, and why the copies dominate.

    Trace launch geometry and boundary checks in a small runnable kernel.

    Public answer
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01–15Foundationsbuild the vocabulary and basic mechanisms0/15 done
16–28Core loopsapply the ideas to worked interview questions0/13 done
29–36Field scenariosreason through constraints and operational failure scenarios0/8 done
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The concepts behind CUDA, Triton & Kernel Engineering

Review the ideas used in these questions. Each card shows whether the explanation is free, requires sign-in or is part of Premium.

Foundational
CUDA Programming ModelCUDA programs launch GPU kernels from host code. Thread indexing, memory access and stream ordering determine whether the result is correct.
Core
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Memory CoalescingCoalescing combines a warp’s nearby memory accesses into fewer transactions. Inspect addresses across lanes to understand how much data each access actually fetches.
Advanced
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Shared Memory and Bank ConflictsShared memory lets threads in a block exchange and reuse data. Bank conflicts occur when an access needs multiple distinct words from the same bank.
Advanced
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Occupancy and Register PressureOccupancy measures how many warps are resident relative to an SM’s limit. Registers, shared memory and launch shape constrain it, but higher occupancy is not always faster.
Foundational
Kernel FusionKernel fusion combines operations so intermediate results can stay on-chip. It can reduce memory traffic and launch overhead, but may increase resource pressure.
Advanced
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Tiled Matrix MultiplicationTiled matrix multiplication reuses input values across many output calculations. Shared-memory and register tiles reduce repeated data movement while consuming limited on-chip resources.
Advanced
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FlashAttention InternalsFlashAttention computes exact attention in tiles without storing the full score or probability matrix in device memory. Follow the running softmax state, understand why inputs can still be reread, and distinguish the mechanisms introduced in the first three papers.
Advanced
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CUTLASS and Tensor Core KernelsCUTLASS provides components for building GPU matrix kernels. It is useful when the required precision, batching or fused operations need more control than a library call offers.
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