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Tiled Matrix Multiplication

Tiled matrix multiplication reuses input values across many output calculations. Shared-memory and register tiles reduce repeated data movement while consuming limited on-chip resources.

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RELATED CONCEPTS

Tensor Cores and Matrix Units Roofline Model Shared Memory and Bank Conflicts Occupancy and Register Pressure CUTLASS and Tensor Core Kernels Memory Coalescing

LESSONS THAT TEACH THIS

Kernels and the MachineShared memory is a manual cache with a bank conflict waiting in it17 min→Kernels and the MachineReuse is the only thing that moves a kernel up the roofline16 min→Kernels and the MachineA tiled matrix multiply connects ownership, reuse and synchronization18 min→

PRACTICE THIS IN REAL QUESTIONS

CUDA, Triton & Kernel EngineeringTake a GEMM from naive to 70% of peak: the steps, the speedup at each, and the arithmetic that says why.→CUDA, Triton & Kernel EngineeringA GEMM launches 96 tiles into 80 execution slots. Should you split K?→GPU & Accelerator ArchitectureExplain how a systolic array computes a matrix multiply. Why is it efficient, and why does it want big square tiles?→CUDA, Triton & Kernel EngineeringExplain shared memory bank conflicts with the bank arithmetic, show a kernel that has them, and fix it with padding.→GPU & Accelerator ArchitectureWhy does the batch size change the TFLOPS a GEMM achieves? Draw the curve and explain each region.→GPU & Accelerator ArchitectureA kernel runs at 25% occupancy. Is that a problem? Walk me through what occupancy buys and when you would leave it low on purpose.→