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AMD · GPU · reviewed 2026-09-12

AMD Instinct MI350X

MI350X and MI355X share 288 GB of HBM3e and 8 TB/s peak bandwidth. MI350X has a lower board-power specification and lower compute peaks.

Memory per accelerator
288 GB

HBM3e

Memory bandwidth
8 TB/s

Published peak, not measured application throughput

Remember this

The 1,000 W figure is board power, not whole-server electricity. MXFP4 support does not mean every four-bit checkpoint runs through that native arithmetic path.

When this is a sensible choice

Start here if…

Compare MI350X when a ROCm workload needs the MI355X memory budget but server power or cooling constrains the configuration. Measure the actual serving workload at the same quality and latency target.

Choose another configuration if…

Do not infer equal training speed from equal HBM. A compute-bound kernel can respond differently to the lower peak, while serving also depends on kernel and collective support.

Specifications with their boundaries attached

Architecture
CDNA 4
Memory
288 GB HBM3e
Memory bandwidth
8 TB/s per accelerator
Peak compute
2,300 TFLOPS BF16; 4,600 FP8; 9,200 MXFP4, dense
Scale-up interconnect
Seven Infinity Fabric links; vendor peak 153 GB/s per link
Host attachment
PCIe 5.0 x16; OAM module
Power
1,000 W typical board power
Partitioning
Verify ROCm compute/memory partition support for the deployment
Catalogue status
Documented product

Compute figures are theoretical peaks at the stated precision. Dense and structured-sparse rates must not be mixed. Bandwidth labelled bidirectional combines both directions. See the source documents.

Follow the bytes · conceptual topology

Three bandwidths, three different jobs

Local memory288 GB HBM3e
Compute enginesExecute kernels on these bytes
① Memory bandwidth: 8 TB/s
Accelerator AOwn local memory
Accelerator BOwn local memory
Scale-up: NVLink, Infinity Fabric or PCIe
Seven Infinity Fabric links; vendor peak 153 GB/s per link
Server AAccelerators + host
Server BAnother fabric domain
③ Scale-out: NICs + switches + placement
InfiniBand, RoCE, EFA or provider-specific transport
A 400 Gb/s NIC has a 50 GB/s raw line-rate equivalent before overhead. A 900 GB/s bidirectional NVLink figure counts traffic in both directions. Neither is the bandwidth at which a GPU reads its own HBM. This diagram explains the boundaries; it is not a wiring diagram for a particular cloud machine.

Where it appears in provider documentation

No provider configuration has been verified for this exact variant in this reference. Consult the linked manufacturer documentation; catalogue absence here is not evidence that the hardware is unavailable.

Model fit and software support

These publisher or serving-engine documents mention this hardware family. They have not been reproduced on our machines.

No model-specific recipe in our reviewed set certifies this exact hardware. The memory calculator can narrow candidates, but it cannot establish software support. Read the model register.

What is the memory floor?

Start with total parameters, then add the memory the workload needs. This arithmetic does not certify a serving configuration. All output sizes below are decimal GB.

Override device capacity with the memory exposed by your allocation, particularly for cloud B300 and partitioned devices. The starting 32 GB budget and 15% reserve are editable teaching assumptions. They are not measurements for the selected model. Mixed-precision tensors, quantization scales, vision encoders and draft models can increase the weight payload.

320 GB

Raw weights only
320B × 8 bits ÷ 8

244.8 GB

Budget per device
288 GB × (1 − 15%)

2 devices

Arithmetic lower bound
round up ((weights + 32) ÷ budget)

WeightsCache + runtimeRemaining budget

This assumes perfectly balanced sharding. A result of three does not prove that a three-device parallel layout is supported. Check layer/expert divisibility, actual allocatable memory, precision kernels and the fabric before renting.

320B is the model card’s total; 18B active is not its storage size. The vLLM recipe reports about 306 GiB for the native FP8 checkpoint. Hopper requires BF16 KV for this model; the documented ROCm path targets gfx950, not every Instinct GPU. Read the model source ↗

For full training, also budget gradients, optimizer states, activations and communication buffers. The inference weight estimate above is insufficient.

Tokens per second, TTFT and TPOT are not certified for this hardware in our reference. Use the benchmark checklist to compare an exact model, software revision and workload.

Nearby memory capacities, different tradeoffs

These are comparison candidates selected by memory capacity, not performance rankings or drop-in replacements.

NVIDIA B300 HGX

288 GB · 8 TB/s

Blackwell Ultra’s larger HBM budget helps large models and long context. A cloud allocation may expose less memory than the 288 GB physical-product figure.

AMD Instinct MI355X

288 GB · 8 TB/s

288 GB of HBM on an AMD CDNA 4 accelerator. The memory is useful only after the model’s kernels and serving engine work on the ROCm target.

NVIDIA GB300 NVL72

279 GB · 8 TB/s

A rack-scale system, not a single PCIe card. This comparison uses 279 GB per GPU from GCP’s four-GPU VM configuration; the full rack includes 72 GPUs and 36 Grace CPUs.

Sources and review scope

Manufacturer and cloud documentation checked 2026-09-12. We reviewed specifications and the stated product boundaries; we did not run training or serving benchmarks on this device. Cloud memory and availability can differ by configuration.

  1. AMD Instinct MI350X specifications · checked 2026-09-12

Cite this reference

AI Infra Interviews. AMD Instinct MI350X: specifications and workload fit. Reviewed . https://aiinfrainterviews.com/hardware/mi350x

Include your access date when citing a changing specification. Link to the specification section for hardware figures or the explanation for a sizing or workload decision.

Research method and limits

We compile manufacturer specifications, cloud documentation, model cards and serving recipes. The reference preserves source units and distinguishes individual devices from nodes and racks. Conflicting figures and unknown fields remain labelled.

Our contribution is the comparison, unit reconciliation, worked arithmetic and workload explanation. Published peaks are vendor specifications. Calculator results are estimates under the displayed assumptions. Neither is a measurement from our own accelerator lab.

For a manufacturer’s specification, consult the original source documents. Cite our page when using its analysis, and retain primary-source attribution for underlying figures. This curated reference does not establish market share, live availability or a universal performance ranking.

Found a discrepancy? Send a correction with the page URL, exact variant, disputed figure and supporting primary document.