Nebius AI Infrastructure Engineer interview questions

See the GPU-instance and compute-instance boundaries, budget a small slice, and distinguish memory capacity controls from bandwidth isolation.

Follow a host buffer across a NUMA boundary, calculate the cost with declared bandwidths, and align CPU workers and memory with the GPU that consumes the data.

Choose a supported tenant boundary, secure the surrounding services, and verify cleanup before reassignment. Calculate fragmentation from actual requests.

Calculate the fleet, duration and rental budget for a 7B training run. Check the deadline, actual sharding scheme and paid reservation period before placing the order.

Derive a complete rail topology and distinguish physical links, switch ports and transceivers. Size storage and management from their own requirements.

Two tenants can fit the average storage budget and still miss both checkpoint deadlines. Work through reservations, borrowing and bounded admission while protecting training reads, then test the design under failure.

Follow a four-GPU request from advertised capacity to concrete devices, and see why free GPUs across nodes cannot satisfy one pod.

Compare the resource promises of MIG, time-slicing and MPS, then test peak memory and simultaneous demand before packing workloads.

Choose the control plane from job admission, placement, recovery and service needs, with a concrete partial-allocation failure.

Diagnose GPU pod failures by scheduling, container startup and execution boundaries, without treating Allocatable as a health certificate.

Size usable inference headroom from the complete readiness delay and demand ramp, then decide which training capacity can safely be borrowed.

A fabric address, an RDMA device and a working GPU-memory registration path are separate requirements. Verify each inside the pod, then test the actual GPU-to-NIC placement and collective behavior.

Follow GPU ownership from reservation through verified delivery and cleanup, with stale-operation fencing, recovery and auditable metering.

Trace a grid into blocks and warps, then distinguish resident work from ready work. Derive an occupancy limit without treating it as a speed target.

Follow the weight bytes through a small decode batch and a long prefill. A scoped roofline calculation explains the difference without pretending to predict actual latency.

Count two matrix shapes to derive the H100 ridge, throughput ceilings and time floors. Compare an illustrative measurement with its bound before deciding what to optimize.

Separate storage scope from physical backing, then follow a warp through adjacent and strided loads. Count useful bytes and requested sectors before inferring HBM traffic or speed.

Derive the weight-only shortcut, then add KV traffic and feasible eight-GPU placement. A worked latency floor shows why batch size alone cannot establish the decode bottleneck.

Choose between supported InfiniBand and RoCE designs using workload tests, congestion behavior and a complete cost model.

Normalize link directions, count collective bytes, and see why a gradient reduction can outlast its real overlap window.

Follow a token into retained attention state, derive bytes per position for a 70B model, and distinguish present cache usage from the room needed to finish a response.