profiling

Use a profiler summary to form a memory-traffic hypothesis, then check counters, timing and useful work before choosing an optimization.

Separate valid 2:4 structure, packed representation and sparse dispatch from model quality and the fraction of request time that can improve.

Separate cache activity from DRAM traffic, check the access width and active lanes, and use a controlled layout change to test a profiler hypothesis. A few percentages cannot predict the fixed kernel’s runtime.

Compute MFU with a stated work model, then follow the training step’s critical path across input, host dispatch, computation and communication. Rank experiments by exposed time instead of assigning universal gains to fixes.

Use per-rank arrival times and controlled substitutions to explain a slow step without mistaking collective wait for network transfer.

Trace graph rewrites, provider placement and shape profiles. Use a fallback counterexample to show why fewer operators can still produce higher latency.

Turn FLOPs and HBM bytes into resource bounds, then compare them with elapsed time. A tighter memory bound suggests an investigation rather than proving the measured bottleneck.

Connect a performance change to its measured mechanism. Compare fair baselines and calculate how a local speedup affects the whole workload.