hbm
AI infra interview questions tagged hbm, across every topic.
5 questions · 3 unlocked for you
Concepts behind "hbm"
Review the concepts used in these questions.
Foundational
GPU Memory HierarchyTrace storage scope and data reuse from registers through shared memory, caches and HBM. Worked register and traffic examples explain why a source-level load is not automatically an HBM transfer.🧩 GPU & Accelerator Architecture
Foundational
The KV CacheThe KV cache saves attention keys and values from processed tokens. Follow one decode step, calculate its memory cost, and see why longer conversations reduce the number of requests a GPU can hold.🚀 Inference & Serving
Advanced
ECC, Row Remapping and Memory ErrorsECC and row remapping detect or manage some GPU memory faults. Recovery depends on error containment, remapping state and the device’s supported procedure.🩺 Fleet Reliability & Observability🔒 Premium
Advanced
TPU Generations: v4 to TPU 8TPU generations differ along three axes that decide a deployment: memory per chip, the ratio of compute to memory bandwidth, and how chips connect. Small-memory 2D-torus parts, large 3D-torus pods and the training/inference split in TPU 8 each fit different workloads.🧩 GPU & Accelerator Architecture🔒 Premium
