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UML PLATFORM ENGINEERING

Uber ML Platform Engineer interview questions

Uber hires staff and mid-level engineers for Michelangelo, its ML-as-a-service platform: the distributed systems behind training, deploying, serving and monitoring models across the company, with GPUs for deep learning as the scheduled resource. The loop is Uber's backend engineering loop with a platform-design round, so the preparation that fits is multi-tenant ML platform design (training orchestration, model registry and serving, feature systems), GPU scheduling and quota policy across many internal teams, and the reliability of a platform other teams build on. Uber has large engineering centres in Bengaluru and Hyderabad. We have not found a Michelangelo-specific first-hand debrief and do not list unconfirmed rounds.

ML PLATFORMS AT PRODUCT COMPANIES

The model serves a product that would exist without it, so the interview weights platform, data and reliability over raw GPU depth.

Loop leans on: ML platform, data infrastructure, serving reliability, developer experience. Compare the other ml platforms at product companies

The Uber ML Platform Engineer interview process

Limited public data
RoleStaff / Software Engineer, AI Platform (Michelangelo)
No reliable public breakdown of the loop; the requirements above come from postings. Rounds unconfirmed.
WHAT THEY'RE EVALUATING
  • Distributed systems for training, deployment, serving and monitoring
  • GPUs for deep learning as the scheduled resource
  • Backend services and multi-tenant platform design

Compiled from our research and publicly available information (candidate reports and company interview guides). Interview loops change and are continuously iterated, and they vary by team, level, and region. Treat this as directional preparation, not an official spec, and confirm the exact rounds with your recruiter or hiring point of contact.

Uber ML Platform Engineer salary

What we can trace, labelled by where it came from. We publish a band only where there is a source behind it, so some of this page is a gap rather than a number.

NO TRACEABLE BAND

We have not found a compensation figure for this role at Uber that we can trace to an employer posting or a public aggregator. Rather than publish an estimate, we are naming the gap. Their careers page is the authority, and postings in some jurisdictions are required to state a range.

HIRING FROM INDIA
Multinational with an India engineering centre

An established India presence, usually Bengaluru, Hyderabad or Pune, hiring on a local band with the parent company's level structure. Far more attainable than the global-remote route, with listed-company equity and the usual multinational benefits.

LEVELREPORTED FOR THIS EMPLOYER TYPE
Early career (IC1-IC2 equivalent)₹26 LPA - ₹45 LPA
Senior (IC3 equivalent)₹37 LPA - ₹85 LPA
Staff and above (IC4+ equivalent)₹69 LPA - ₹1.4 Cr

Reported total compensation for NVIDIA software engineers in India by level, per levels.fyi self-reports (accessed September 2026; IC3 median about ₹62 LPA, IC4 median about ₹94 LPA), used as the reference for this employer type. Not a figure reported for this company or for this exact title; bands vary by internal level and by company.

Full method, US bands by level, and the three India tiers side by side are in the AI infra salary guide, including what actually moves your number between these tiers.

Representative ML Platform Engineer questions for Uber's loop

Uber's loop draws from these tracks. Here are the highest-signal questions in each, ordered by what candidates rate most useful.

16 questions · 10 unlocked for you

Go deeper on the topics Uber's loop tests

The tracks that map to a Uber ML Platform Engineer loop, ordered easy to hard.

The concepts Uber's ML Platform Engineer loop assumes you know

The vocabulary and mental models behind Uber's questions, from our curriculum. Start with the foundations free; the deeper, interview-defining ideas are part of premium.

AI SYSTEMS DESIGN

Foundational
Inference Platform ArchitectureAn LLM inference platform is the layer between a product's API call and a GPU running a serving engine, and every design round starts from its reference shape: a gateway that authenticates and rate-limits, a router that picks a replica with the right model and a warm cache, a per-replica scheduler that batches, engines that run prefill and decode, a KV cache tier, an autoscaler, and the observability that makes it operable. This page draws that shape, sizes each box for a concrete workload, and walks the derivation from user demand to replica count that every design answer has to contain.
Advanced🔒 Premium
Request Routing and Load Balancing for LLMsA load balancer for stateless web services spreads requests evenly and is done. A router for LLM replicas has two things a web balancer never had to think about: each replica holds a cache (the KV pages of recent prefixes) that makes some replicas far cheaper than others for a given request, and each request costs a wildly different amount, so counting connections is meaningless. This page builds the router that handles both: prefix-aware placement with load-aware fallback, cost-aware queue estimates, session affinity, and the failure handling when a replica restarts and its cache is gone.
CoreSign in
GPU Job Scheduler DesignDesign a scheduler for a shared GPU cluster is the most common design prompt in AI infrastructure interviews, because it touches everything: queues and priorities, gang placement, topology, fairness across teams, preemption and the checkpoints that make it survivable, and the failure handling that keeps a 512-GPU job alive. This page builds the design in layers, states the data model and the scheduling loop, derives the numbers (how long a job waits, how much preemption costs, how much fragmentation wastes), and lists the trade-offs the interviewer will push on.
Advanced🔒 Premium
Training Cluster Design at 10k GPUsDesign a cluster for training frontier models is the prompt that tests whether a candidate can hold hardware, network, storage, scheduling and reliability in one head at once. The answer is a bill of materials with a reason for every line: how many GPUs and why, how they are grouped into pods, how the fabric connects the pods and what it costs a collective to cross one, how much storage bandwidth the checkpoints and the data loader need, how power and cooling bound the whole thing, and how the failure statistics set the spare pool and the checkpoint cadence. This page derives each line for a 10,240-GPU cluster.

SCHEDULING & ORCHESTRATION

Foundational
Kubernetes GPU SchedulingKubernetes knows nothing about GPUs until something tells it. The NVIDIA device plugin advertises each node's GPUs as a countable resource, the scheduler matches a pod's request to a node with enough of them, and the container runtime wires the device in. That model is enough for one job per GPU and breaks the moment you need sharing, topology or multi-node placement, which is where Dynamic Resource Allocation, the GPU Operator and the batch schedulers come in. Knowing which layer does what is the platform interview's opening question.
CoreSign in
MIG, MPS and Time-SlicingA whole H100 is far more than a notebook, a small inference service or a CI job needs, and giving each of them a card leaves most of the fleet idle. Three mechanisms share a GPU, and they differ in what they isolate: MIG partitions the hardware into up to seven slices with their own memory and compute, MPS lets several processes share one GPU's SMs concurrently with no memory isolation, and time-slicing context-switches between processes with no isolation at all. The choice is the isolation the workload needs against the utilization the platform wants.
Advanced🔒 Premium
Gang Scheduling with Kueue and VolcanoA distributed training job is 64 pods that start together or not at all: if 40 are running and 24 are Pending, the 40 hold their GPUs idle at a collective barrier waiting for ranks that may never come, and two such jobs can deadlock a whole cluster. Gang scheduling makes the job the unit of admission. Kueue and Volcano add queues, quotas, priorities and preemption on top, which is what turns a pile of GPUs into a platform several teams can share without starving each other.
Advanced🔒 Premium
Topology-Aware SchedulingTwo placements of the same 64-GPU job can differ by 2x in step time: one keeps every tensor-parallel group on a single NVSwitch node and every data-parallel ring on a single rail, the other scatters ranks across racks and pushes per-layer traffic through the spine. The scheduler is the only thing that can prevent the second placement, because the framework maps ranks to whatever GPUs it is handed. Topology-aware scheduling means the scheduler knows the hierarchy (NVLink domain, rail, rack, spine block) and places gangs to keep traffic low in it.

FLEET RELIABILITY & OBSERVABILITY

Foundational
GPU Failure Modes and XID ErrorsWhen a GPU misbehaves, the NVIDIA driver writes an XID line to the kernel log, and the number on that line is the first and often the only clue to what happened. Fleet engineers learn a dozen of them the way doctors learn a dozen lab values: 13 and 31 are almost always the application, 48 and 95 are memory that needs a reset, 63 and 64 are the row remapper reporting or failing, 74 is the NVLink fabric, 79 is a GPU that has vanished from the PCIe bus. This page gives the taxonomy, the decision for each (retry, reset, drain, RMA), and the derivation of how often a big fleet should expect each.
CoreSign in
DCGM and GPU TelemetryNVIDIA's Data Center GPU Manager reads a GPU's counters, runs its diagnostics and exports both to the monitoring stack, and nearly every fleet's dashboards and alerts are built on it. The skill is knowing which of its hundreds of fields carry signal: the profiling metrics that say whether the tensor cores are busy (not the utilization number everyone reads first), the error counters that predict a failure, the throttle reasons that explain a slow step, and the diagnostic levels that decide whether a node returns to the pool. This page walks those fields, derives an MFU estimate from them, and gives a fleet's alert thresholds.
Advanced🔒 Premium
ECC, Row Remapping and Memory ErrorsHBM stacks flip bits, and the difference between a fleet that shrugs and one that loses a training step to corruption is error-correcting codes plus the machinery that retires bad memory before it produces a double-bit error. A single-bit error is corrected silently and counted; a double-bit error is detected, kills the process, and on Ampere and later triggers the row remapper to swap the failing row for a spare at the next reset. This page explains the codes, the remapper's states, how to read the counters as a prediction of failure, and the RMA rules a fleet applies.
Advanced🔒 Premium
NVLink and Fabric FaultsThe links between GPUs are the part of a training node with the most connectors, the highest signalling rates and the least forgiveness: one marginal NVLink cable or one NVSwitch port turns an eight-GPU node into a straggler that slows a thousand-GPU job, and the symptom arrives as an NCCL timeout three layers away from the cause. This page covers what the links are, what their error counters mean, how a fault shows up in NCCL and in step time, how to isolate it to a GPU, a cable or a switch, and the arithmetic of why one degraded link is a whole-job problem.

CODING FOR INFRA

Foundational
The GPU Credit Scheduler PatternThe most widely reported coding problem in AI infrastructure loops is a small scheduler: accounts hold credits, jobs arrive with a cost and a priority, and you must decide which jobs run, in what order, without letting any account overspend, then extend it under follow-ups (refunds, reservations, concurrency limits, fairness). It is not a trick question; it is a test of whether you can model state cleanly, pick the right data structures, keep invariants under mutation, and talk about complexity while typing. This page works the problem from the first line to the fourth follow-up, with the code, the invariants, and the derivations.
CoreSign in
Rate-Limiting AlgorithmsA rate limiter answers one question, 'may this request proceed now?', and the three classic algorithms answer it with different shapes of fairness and memory: the token bucket allows bursts up to a capacity and refills at a rate, the leaky bucket smooths output to a fixed rate, and sliding windows count recent requests exactly or approximately. AI platforms limit in tokens as well as requests, per tenant, across many gateways, which adds two twists: a request's cost is unknown until it finishes, and the counters must be shared. This page derives each algorithm, implements the token bucket correctly, and covers both twists.
Advanced🔒 Premium
Batching Queues and BackpressureWrite a request batcher is the coding round's version of the serving engine's scheduler: requests arrive one at a time, the GPU wants them in groups, and the batcher decides when a group is full enough to send without holding anyone too long or accepting more than it can hold. The two knobs are the maximum batch size and the maximum wait, the invariant is a bounded queue, and the follow-ups (priorities, cost-aware batching, cancellation, bounded in-flight batches) are the ideas the real engines carry. This page implements the batcher in asyncio, derives what each knob buys, and walks the follow-ups.
Advanced🔒 Premium
Interval Merging and Utilization LogsGiven busy intervals per GPU, when was the whole cluster idle? What was the utilization per hour from a log of start and stop events? Which jobs overlapped? These are the interval problems of the infrastructure coding screen, and they share one tool: sort the endpoints and sweep. The sweep line turns every variant into a single pass with a counter, the sort is the only thing that costs more than linear time, and the edge cases (touching intervals, zero-length events, an unterminated start) are where candidates lose the round. This page works the standard problem and its relatives with code, tests and the complexity derivation.

Where to apply, and official Uber resources

Straight from Uber: open roles and the company's own hiring guidance. Prep here, then apply there.

External links to Uber's own pages. Roles and processes change; always confirm on the official site.

ABOUT THE ROLE
UBER INTERVIEW FAQ
Does Uber hire AI infrastructure engineers?

Yes: Staff Software Engineer, AI Platform (Michelangelo) in Sunnyvale and Software Engineer, Machine Learning Platform (Michelangelo) in Seattle, per 2026 postings, plus platform roles in its Bengaluru and Hyderabad centres.

What does the Uber AI infrastructure interview test?
What is the Uber AI infrastructure engineer salary?

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